Questionnaire guidelines:
Typically, you just have to spend an hour skimming through the first paper on
the list. Spend a few minutes thinking about the problem/approach/contributions
of the paper and then answer the questionnaire briefly. This is mainly testing
your ability to think critically about the problem at hand. A response of
around 100 words is fine, although longer responses are also welcome. 


Question: 
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Co-operative Caching for Chip Multiprocessors

Consider the following two multi-core models:
- 16 cores, each with a private L1, and a large shared L2
- 16 cores, each with a private L1, and each with a private L2

What are the interconnect and logic requirements on chip to maintain
cache coherence for either case? Which is better, in your opinion?

As Chief Architect of the Intel Core2-16-ExtremeEdition, what large (say 64MB)
cache hierarchy and optimizations (S-NUCA, D-NUCA, Cooperation, etc.) will
you adopt and why?